This invention relates to high voltage semiconductor circuits and devices, and in particular to a dielectrically isolated structure which permits close packing of devices in a semiconductor substrate.
A great need is presently developing for integrated arrays of high voltage devices, such as in telephone crosspoint switching. Fabrication of such devices presents special problems due to the relatively high bias supplied to the devices. For example, it is known to fabricate devices utilizing localized surface regions in single crystalline silicon tubs situated in a polycrystalline substrate and to electrically isolate the tubs with a dielectric layer such as SiO.sub.2 (see, for example, U.S. Pat. No. 3,411,051, issued to Kilby). While such structures are adequate, their use in high voltage applications results in certain problems. In particular, it is necessary to locate the surface regions of the devices sufficiently far removed from the polysilicon substrate so that the potential of the substrate will not cause breakdown. This has necessitated use of deep tubs (typically 45 .mu.m deep for a device operating at 500 volts) with wide lateral dimensions (typically 55 .mu.m from the surface region to the end of the tub) which has prevented fabrication of closely spaced structures.
It is therefore an object of the invention to provide a high voltage integrated circuit with a device structure which permits close spacing of devices.